Additional Resources
Online Verilog Simulator
Quick Verilog Reference (for quick syntax checks and tips)
Stanford Verilog Quick Reference
Verilog Problem Sets (great practice)
Writing an FSM (a solid FSM is priceless)
In-Depth Verilog Reference (goes well with a cup of coffee)
Difference between (System)Verilog, VDHL etc.
CMU’s Open EDA Course Great course overall, this lec includes relevant sections from the paper above
What is SystemVerilog
https://lcdm-eng.com/papers/snug13_SNUG-SV-2013_Synthesizable-SystemVerilog_paper.pdf
Tutorials:
http://asic-world.com/verilog/veritut.html